Fixed point Representation | Readstall

Fixed point Representation

13-12-18 Gudditi Naganjaneyulu 0 comment

Fixed point Representation

                   Point integers including zero can be represented as unsigned numbers. To represent negative integers, we need a notation. We all know that, a negative number is indicated by a minus sign. Become of hardware limitations, computers must represent everything with 1’s and 0’s including the sign of the number. So, the computer convention is 0 for positive sign and 1 for negative sign.

Binary point:

                   The representation of the binary point in a register is characterized by a position in the register. The position of the binary point is needed to represent to fractions, integers, or mixed integer-fraction numbers.

There are two ways of specifying the position of binary point in a register.

-By giving it a fixed position

-By employing a floating point representation

          But the fixed point assumes that the binary point is always fixed in one position. The two positions are widely used. They are

  1. A  binary point in the extreme left of the register to make the stored number as a fraction
  2. A binary point in the extreme right of the register to make the stored number as an integer.

If the binary point is not actually exist in the register,

then its presence will be assumed by the number stored in the register is treated as a fraction or as an integer.

          The floating point representation user a second register to store a number that designater the position of the decimal point in the first register.

Integer:

          When an integer is positive number the sign is represented by 0 and the magnitude by a positive binary number. When the integer is negative number then the sign represented by 1 and the remaining will ma represented in one of the three following possible ways.

-signed magnitude representation

-signed -1’s complement representation

-signed -2’s complement representation

          The signed magnitude representation of a negative number consists of magnitude and a negative sign. In other two cases th –ve number represented in either 1’s complement or 2’s complement of its +ve value.

Eg: consider a positive integer 14, and assume it is stored in an 8-bit register. As it is a +ve number. The sign bit is 0 in left most position followed by binary equivalent.

         14:00001110

8-bit representation

0 0 0 0 1 1 1 0

          If it is a negative number , we have 3 different ways to represent -14 with 8 bits. The sign bit is 1.

Signed magnitude representation

Signed 1’s complement representation

Signed 2’s complement representation

  • The signed magnitude representation of -14 is obtained from +14 by complementing the only the sign bit.
  • The signed 1’s complement representation of -14 is obtained by complementing all the bits of +14 including the sign bit.
  • The signed 2’s complement representation of -14 is obtained by taking the 2’s complement of the +ve number, including its sign bit.

Pro’s & Con’s:

              The signed magnitude system is used in ordinary arithmetic but is awkward when employed in computer arithmetic. Therefore the signed complement is normally used. The 1’s complement imposes difficulties because it has two representations of 0 (+0 & -0).

It is rarely used for arithmetic operations except in some order computers.

Arithmetic Addition:

              Addition of two numbers in signed magnitude system follows the rules of ordinary mathematic addition rules. If we add the two magnitudes and give the common sign if the signs are same. If signs are different, we subtract the smaller magnitude from the larger gives the result the sign of the larger magnitude as follows

Eg:    25,   37

         25+37=62

         25,   -37

        25+(-37)=-(37-25)

                       =-12

2’s complement addition:

              In this case, the system does not require comparision or subtraction, only addition and complementation.

In this case, addition is very simple. Add the two numbers including the is sign bits and discard any carry out do the sign bit position.

Eg:

     +6              00000110

    +13                  00010011

                             00010011

      -6               11111010

      +13            00001101

                         00000111

      +6                00000110

       -13              11110011

                          11111001

        -6              11111010

         -13           11110011

                          11101101

To determine the value of –ve number in signed 2’s complement, it is necessary to convert it to a +ve number to place it in a more familias form.

Eg:

Signed binary number 11111001 is –ve because the left most bit is 1. It’s 2’s complement is 00000111 which is binary equivalent of +7. Therefore we can recognize then original –ve number to be equal to -7.

Arithmetic subtraction:

              Subtraction of two binary –ve numbers in 2’s complement form is very simple. Take the 2’s complement of the subtrahend including sign bit and ass it to the minuend. The carryout of the sign bit position will be discarded. This shows that the subtraction operation can be changed to an addition operation if the sign of the subtrahend is changed. This is demonstrated as follows.

              (±A)-(+B)=(±A)+(-B)

              (±A)-(-B)=(±A)+(+B)

     By taking 2’s complement we can easily change a +ve number to a –ve number. The reverse is also true because the complement of a     -ve number in complement form produces the equivalent +ve number.

By taking an example of subtraction

(-6)-(-13)=+7

In binary form

     -6=11111010

     -13=11110011

(-6)-(-13)=-6+13

              -6=11111010

            +13=00001101

                     100000111

By removing the end carry

We get 00000111 which is (+7)

The user or programmer must interpret the results of such addition or subtraction differently depending on whether it is assumed that the numbers are signed or unsigned. In signed 2’s complement system addition and subtraction rules are as same as basic arithmetic calculations. Therefore computers used only one common hardware circuit to handle both types of arithmetic .

Overflow:

              An overflow may occurs if the two numbers added are both +ve or both –ve. Overflow cannot occurs after an addition if one number is +ve & the other is –ve consider the example

     +70              01000110

     +80              01010000

   +150              10010110

             Carries: 0    1

     -70         10111010

     -80         10110000

 -150           01101010

              Carries : 1   0

Since the integers value range is from +127 to -128. The sum of given two numbers is +150, it exceeds the capacity of 8-bit register. The carryout of sign bit position is taken as the sign bit of  result, the 9-bit answer so obtained will be correct since the answer cannot be accommodated  within 8-bits, we say that an overflow occurred..

Overflow:

              An overflow condition can be detected by observing the carry into the sign bit position & the carryout of the sign bit position. If these two carries are not equal, an overflow condition is produced. If the two carries are applied to an exclusive –DR gate, an overflow will be detected when the output of the gate is equal to 1.

Decimal fixed-point Representation:

              Representation of decimal numbers in registers is a function of binary code used to represent a decimal digit. A 4-bit decimal code requires 4 flip flops for each decimal digit.

For example:   Representation of 4385 in BCD requires 16flip flops four flip-flops for each digit. The number will be represented in a register with 16-flipflops as follows

        0100    0011    1000     0101

Advantage :-

              Some of the applications such as business data processing, require small amounts of arithmetic computations compared to the amount required for input & output of decimal data. For this reason, some computers & calculations perform arithmetic calculations directly with decimal data.

  • Some computer systems have hardware for arithmetic calculations with both binary & decimal data.

                  The procedure of this representation is as same as signed 2’s complement system for decimal numbers.

      0 375    (0000     0011    0111     0101) BCD

 +   9 760    (1001     0111    0110     0000) BCD

      0 135    (0000      0001   0011     0101) BCD

In the 10’s complement system

  Subtraction of decimal numbers either unsigned or in the signed 10’s complement system is the same as in the binary case take the 10’s complement of subtracted * add it to the minned. Many computers have special hardware to perform arithmetic calculations directly with decimal number is BCD. The user of the computer can specify by programmed instructions that the arithmetic operations be performed with decimal numbers directly without having to convert them to binary. 



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